GSI Forum
GSI Helmholtzzentrum für Schwerionenforschung

Home » FutureDAQ » FutureDAQ - Networking » PCIe-AS - Tutorial -- Is there a CRC for the address header ?
Re: PCIe-AS - Tutorial -- Is there a CRC for the address header ? [message #930 is a reply to message #929] Wed, 15 September 2004 16:40 Go to previous messageGo to previous message
David Slogsnat is currently offline  David Slogsnat
Messages: 3
Registered: September 2004
Location: Mannheim University
occasional visitor
From: *ra.informatik.uni-mannheim.de
Walter F.J. Müller wrote on Wed, 15 September 2004 16:05

David Slogsnat wrote on Wed, 15 September 2004 14:59

This is true. However, things get more complicated when looking at the ASI specification:
-The Turn Pointer is not included in the header CRC.
-The final receiver of an AS Packet has to check the CRC. The intermediate switches may check it, but they don't have to.

One thing you can observe from this is that a packet may reach a wrong receiver due to an bit error in the Turn Pointer. The sender cannot be notified of this failed message transfer, since the Turn Pool in reverse direction does not lead to it.

Also, i wonder how the wrong receiver finds out that the packet was intended for another destination, since the header CRC check will not show an error!!!



How were all these header corruption issues solved in ATOLL, which uses a quite similar path addressing scheme ?


ATOLL does not use something like a turn pointer. Instead, there is just a routing string, which is composed of routing bytes. The first routing byte contains the routing information for the next switch(crossbar). At every switch, the leading routing byte is removed. And so on....
Every single routing byte is parity checked at each hop(parity check is only a very small overhead). If there is an error, the packet is retransmitted on link level.
 
Read Message
Read Message
Read Message
Read Message
Read Message
Read Message
Read Message
Read Message icon5.gif
Read Message
Previous Topic: PCIe-AS - What are limitations on Network size ?
Next Topic: Performance of Ethernet Switches for small Packets
Goto Forum:
  


Current Time: Thu Mar 28 15:09:58 CET 2024

Total time taken to generate the page: 0.00759 seconds